Flip chips are widely used in the semiconductor industry. A flip chip semiconductor package includes a flip chip mounted onto a package substrate, such as an organic substrate, through its solder bumps. The solder bumps are electrically connected to respective contact pads on the package substrate.
The coefficients of thermal expansion (CTE) of the flip chip and package substrate are mismatched. Mismatched CTE causes mechanical stress on the different components of the package as it experiences temperature excursions from thermal cycling or operation of the chip. This can negatively impact package reliability.
Also, with the strive towards higher performance of semiconductor packages, Input/Output (I/O) pads of flip chips are moving towards smaller pitches. As there is a limitation to the pitch of the contact pads of the package substrate, which couple to the respective I/O pads of the flip chip via the solder bumps, it has become a challenge to directly mount the flip chip onto the package substrate.
From the foregoing discussion, there is a desire to provide an improved package.